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Product Description
Sirenza Microdevices' STA-6033 is a high efficiency class AB Heterojunction Bipolar Transistor (HBT) amplifier housed in a low-cost surface-mountable plastic package. This HBT amplifier is made with InGaP on GaAs device technology and fabricated with MOCVD for an ideal combination of low cost and high reliability. This product is specifically designed as a final stage for 802.11a equipment in the 4.9 - 5.9 GHz band. It can run from a 3.0V to 3.6V supply. Optimized on-chip impedance matching circuitry provides a 50 nominal RF input impedance. A single external output matching circuit covers the entire 4.9-5.9GHz band. The external output match allows for load line optimization for other applications or optimized performance over narrower bands. It is designed as a drop in replacement for similar parts in its class. This product is available in a RoHS Compliant and Green package with matte tin finish, designated by the "Z" package suffix.
STA-6033 STA-6033Z
Pb
RoHS Compliant & Green Package
4.9 - 5.9 GHz 3.3V Power Amplifier
16 pin 3mm x 3mm QFN
Product Features
* * * * * * * * * *
802.11a 54Mb/s Class AB Performance Pout = 18dBm @ 3% EVM, 3.3V, 210mA High Gain = 27dB Output Return Loss < -12dB for Linear Tune On-chip Output Power Detector Simultaneous 4.9- 5.9GHz Broadband Pin Compatible with Microsemi LX5506 Robust - Survives RF Input Power = +20dBm Power up/down control < 1s
Functional Block Diagram
Vcc Power Up/Down Control
Active Bias
Active Bias
Active Bias
RFIN
RFOUT
Applications
802.11a WLAN, OFDM, 5.8GHz ISM Band 802.16 WiMax, Fixed Wireless, UNII
Unit MHz dBm Min. 4900 26.5 24.0 27.5 22.0 25.5 29.5 24.0 18 18 -38 5.7 11 8 15 12 0.8 to 1.5 130 165 1.5 5 28 100 190 -34 31.5 26.0 Typ. Max. 5900
Power Detector Vout
Key Specifications
Symbol fO P1dB S21 Pout IM3 NF IRL ORL Vdet Range Icq IVPC ILEAK Rth, j-l Parameters: Test Conditions, App circuit page 4 Z0 = 50, VCC = Vpc = 3.3V, Icq = 165mA, TBP = 30C Frequency of Operation Output Power at 1dB Compression - 4.9 GHz Output Power at 1dB Compression - 5.875 GHz Gain at 4.9 GHz Gain at 5.875 GHz Output power at 3% EVM 802.11a 54Mb/s - 5.15GHz Output Power at 3% EVM 802.11a 54Mb/s - 5.875GHz Third Order Intermod at Pout=15dBm per tone - 5.875GHz Noise Figure at 5.875 GHz Worst Case Input Return Loss 4.9-5.875GHz Worst Case Output Return Loss 4.9-5.875GHz Output Voltage Range for Pout=7dBm to 23dBm Vcc Quiescent Current Power Up Control Current,Vpc=3.3V ( IVPC1 + IVPC2 + IVPC3) Off Vcc Leakage Current Vpc=0V Thermal Resistance (junction - lead)
dB
dBm dBc dB dB V mA mA uA C/W
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or ommisions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2002 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 1
http://www.sirenza.com EDS-103643 Rev F
STA-6033 4.9-5.9 GHz Power Amp
Pin Out Description
Pin # 1,4,9,12,13 5 Function N/C VPC1 Description Pins are not used. May be grounded, left open, or connected to adjacent pin. VPC1 is the bias control pin for the stage 1 active bias circuit. An external series resistor is required for proper setting of bias levels. Refer to the evaluation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is +1V greater than voltage applied to pin 16 (Vbias) unless Vpc supply current capability is less than 10 mA. VPC2 is the bias control pin for the stage 2 active bias circuit. An external series resistor is required for proper setting of bias levels. Refer to the evaluation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is +1V greater than voltage applied to pin 16 (Vbias) unless Vpc supply current capability is less than 10 mA. VPC3 is the control pin for the stage 3 active bias circuits. An external series resistor is required for proper setting of bias levels. Refer to the evaluation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is +1V greater than voltage applied to pin 16 (Vbias) unless Vpc supply current capability is less than 10 mA. Ouput power detector voltage. Load with 10K-100K ohms to ground for best performance. RF input pins. This is DC grounded internal to the IC. Do not apply voltage to this pin. All three pins must be used for proper operation. RF output pin. This is also another connection to the 3rd stage collector 3rd stage collector bias pin. Apply 3.0V to 3.6V to this pin. 2nd stage collector bias pin. Apply 3.0V to 3.6V to this pin.
6
VPC2
7 8 2,3 10,11 14 15 16 EPAD
VPC3 Vdet RFIN RFOUT VC3 VC2
VC1,Vbias 1st stage collector bias pin and active bias network VCC. Apply 3.0V to 3.6V to this pin. Gnd Exposed area on the bottom side of the package needs to be soldered to the ground plane of the board for optimum thermal and RF performance. Several vias should be located under the EPAD as shown in the recommended land pattern (page 5).
Simplified Device Schematic
Pin 5 Pin 16 Pin 15 Pin 7 Pin 14
Absolute Maximum Ratings
Parameters VC3 Collector Bias Current (pin16) VC2 Collector Bias Current (pin18) VC1 Collector Bias Current (pin19) Device Voltage (VD) Power Dissipation Value 400 140 50 4.5 1.4 -40 to +85 20 -40 to +150 +150 1000 Unit mA mA mA V W C dBm C C V
Pin 6
Stage 1 Bias
Stage 2 Bias
Stage 3 Bias
Operating Lead Temperature (TL) RF Input Power for 50 ohm load
Pin 10,11
Storage Temperature Range Operating Junction Temperature (TJ)
Pin 2, 3
ESD Human Body Model - Class 1C
EPAD
EPAD
Pin 8
EPAD
Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation the device voltage and current must not exceed the maximum operating values specified in the table on page one. Bias conditions should also satisfy the following expression: IDVD < (TJ - TL) / RTH' j-l
Caution: ESD Sensitive
Appropriate precaution in handling, packaging and testing devices must be observed.
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 2
http://www.sirenza.com EDS-103643 Rev F
STA-6033 4.9-5.9 GHz Power Amp
4.9 - 5.9 GHz Evaluation Board Data (Vcc = Vpc = 3.3V, Iq = 165mA)
Typical S11 Input Return Loss
0 -5 -10 S11(dB) -20 -25 -30 -35 -40 4.5 5.0 5.5 Frequency(GHz) -40c 0c 25c 70c 85c
-40c 10 5 S21(dB) 35 30 25 20 15
Typical S21 Gain
-15
6.0
6.5
4.5
5.0
5.5 Frequency(GHz) 0c 25c
6.0
6.5
70c
85c
Typical S12 Isolation
-30
Typical S22 Output Return Loss
0 -5 S22(dB) -10 -15 -20
-35 S12(dB)
-40
-45
-50 4.5 5.0 5.5 Frequency(GHz) -40c 0c 25c 70c 85c 6.0 6.5
-25 4.5 5.0 5.5 Frequency(GHz) -40c 0c 25c 70c 85c 6.0 6.5
Gain vs Pout, T=25c
30 29 28 Gain(dB) 26 25 24 23 22 10 12 14 16 18 20 22 24 26 28 Pout(dBm)
4.9GHz 5.15GHz 5.35GHz 5.725GHz 5.875GHz
IM3 vs Pout (per tone) T=+25c Tone spacing = 1.2MHz
-20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 0 5
4.9GHz
IM3(dBc)
27
10
5.15GHz 5.35GHz
15
5.725GHz
20
5.875GHz
25
Pout(dBm)
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 3
http://www.sirenza.com EDS-103643 Rev F
STA-6033 4.9-5.9 GHz Power Amp
4.9 - 5.9 GHz Evaluation Board Data (Vcc = 3.3V, Iq = 165mA)
Icq vs Vcc (Vcc and Vpc tied together) 0.45 0.4 0.35 0.3 Icq(A)
Idc(A) 0.40 0.35 0.30 0.25 0.20 0.45
Idc vs Pout, T=25C
0.25 0.2 0.15 0.1 0.05 0 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 Vcc/Vpc(V)
+25c 0c -40c +70c +85c
0.15 10.0
12.0
14.0
16.0
18.0 Pout(dBm)
20.0
22.0
24.0
26.0
F=4.9
F=5.15
F=5.35
F=5.725
F=5.875
0.3 0.25
Icq vs Vpc vs Vpc Enable Set Voltage, For Fixed Vcc=3.3v , T=+25c
20 19.5 19
Pout(dBm)
POUT @ 3% EVM vs Vcc for Fixed Vpc=3.3, F=5.725GHz
0.2 Icq(A) 0.15 0.1 0.05 0 1.2 1.4 1.6 1.8
2.9v
18.5 18 17.5 17 16.5 16 15.5 15 2.7
2.9
3.1 Vcc(V)
3.3
3.5
3.7
2 2.2 2.4 2.6 2.8 Swept VPC (V)
3.0v 3.1v
3 3.2 3.4 3.6
3.3v
3.2v
0c
+25c
+70c
EVM(%) @ Pout=18dBm vs. Vpc Set Voltage vs. Temp F=5.725GHz 4 3.5
EVM(%)
3
Intentionally left blank
2.5 2 1.5 1 -40 -20 0 20 40 60 80 100 Temp(C) 2.9v 3v 3.1v 3.2v 3.3v
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 4
http://www.sirenza.com EDS-103643 Rev F
STA-6033 4.9-5.9 GHz Power Amp
4.9 - 5.9 GHz Evaluation Board Data (Vcc = Vpc = 3.3V, Iq = 165mA)
802.11a EVM, OFDM, 54Mb/s, 64QAM
EVM vs Pout, F=4.9GHz
5 4.5 4 3.5 EVM(%) 3 2.5 2 1.5 1 0.5 0
EVM vs Pout, T=25c
4.5 4 3.5 3 EVM(%) 2.5 2 1.5 1 0.5 0 4 6 8 10 12 14 Pout(dBm) 5.725GHz 16 18 20
4
6
8
10
12 POUT(dBm)
14
16
18
20
4.9GHz
5.15GHz
5.35GHz
5.875GHz
+25c
0c
-40c
+70c
+85c
EVM vs Pout, F=5.15GHz
4.5 4 3.5 EVM(%) EVM(%) 3 2.5 2 1.5 1 0.5 0 4 6 8 10 12 POUT(dBm) +25c 0c -40c +70c +85c 14 16 18 20 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 4 6
EVM vs Pout, F=5.35GHz
8
10
12 POUT(dBm)
14
16
18
20
+25c
0c
-40c
+70c
+85c
EVM vs Pout, F=5.725GHz
6 5 EVM(%) EVM(%) 4 3 2 1 0 4 6 8 10 12 POUT(dBm) +25c 0c -40c +70c +85c 14 16 18 20 7 6 5 4 3 2 1 0 4 6
EVM vs Pout, F=5.875GHz
8
10
12 POUT(dBm)
14
16
18
20
+25c
0c
-40c
+70c
+85c
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 5
http://www.sirenza.com EDS-103643 Rev F
STA-6033 4.9-5.9 GHz Power Amp
4.9 - 5.9 GHz Evaluation Board Data (Vcc = Vpc= 3.3V, Iq = 165mA)
RF detector output (Vdet) vs Pout, T=25c
2.30 2.10 1.90
RFdetector output(Vdet) vs Pout, F=4.9G Hz 1.8 1.6 Vdet(V) 1.4 1.2 1 0.8
Vdet(V)
1.70 1.50 1.30 1.10 0.90 0.70 10.0 12.5 15.0 17.5 20.0 22.5 25.0 27.5
10
12
14
16
18 Pout(dBm)
20
22
24
26
Output Power(dBm)
4.9GHz 5.15GHz 5.35GHz 5.725GHz 5.875GHz
+25c
0c
-40c
+70c
+85c
RF detector output(Vdet) vs Pout, F=5.15GHz 1.8 1.6 Vdet(V)
Vdet(V) 1.8 1.6 1.4 1.2 1 0.8
RF detector output(Vdet) vs Pout, F=5.35GHz
1.4 1.2 1 0.8 10 12 14 16 18 20 22 24 26 Pout(dBm) +25c 0c -40c +70c +85c
10
12
14
16
18
20
22
24
26
Pout(dBm ) +25c 0c -40c +70c +85c
RF detector output(Vdet) vs Pout, F=5.725GHz 1.8 1.6 Vdet(V) 1.4 1.2 1 0.8 10 12 14 16 18 20 22 24 26 Pout(dBm) +25c 0c -40c +70c +85c
Vdet(V) 1.8 1.6 1.4 1.2 1 0.8 10
RF detector output(Vdet) vs Pout F=5.875GHz
12
14
16
18
20
22
24
26
Pout(dBm) +25c 0c -40c +70c +85c
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 6
http://www.sirenza.com EDS-103643 Rev F
STA-6033 4.9-5.9 GHz Power Amp
4.9 - 5.9 GHz Evaluation Board Schematic For Vcc = Vpc = V+ = 3.3V Supply
Notes: R5 (0 ohm jumper) is required for parasitic inductance (~0.4nH). R4 simulates external circuit loading to ground. Recommended load range is 47K100K ohms. Pins 1,4,9,12,13 are unwired (N/C) inside the package. Refer to page 2 for detailed pin descriptions. Some of these pins are wired to adjacent pins or grounded as shown in the application circuit. This is to maintain consistency with the evaluation board layout shown below. It is recommended to use this layout and wiring to achieve the specified performance. To prevent potential damage, do not apply voltage to the Vpc pin that is +1V greater than voltage applied to pin 16 (Vbias/Vcc) unless Vpc supply current capability is less than 10 mA. See table below for other Vpc logic level resistor values.
4.9 - 5.9 GHz Evaluation Board Layout For Vcc = Vpc = V+ = 3.3V Supply
- Board material GETEK, 10mil thick, Dk=3.9, 2 oz. copper finish
C1 C7 C6 R5 C4 Q1 C8 R1 R2 C9 R3 R4 C3 C2 C5
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 7
http://www.sirenza.com EDS-103643 Rev F
STA-6033 4.9-5.9 GHz Power Amp
Part Symbolization
The part will be symbolized with an "STA-6033" for Sn/Pb plating or "STA-6033Z" for RoHS green compliant product. Marking designator will be on the top surface of the package.
Part Number Ordering Information
Part Number STA-6033 STA-6033Z Reel Size 13" 13" Devices/Reel 3000 3000
Package Outline Drawing (dimensions in mm ):
STA-6033 - 85/15 Sn/Pb plating STA-6033Z - Matte Sn plating
STA6033 lot id
Recommended Land Pattern (dimensions in mm[in].):
Recommended PCB Soldermask (SMOBC) for Land Pattern(dimensions in mm[in]):
0.50 [0.020]
1.58 [0.062] 0.50 [0.020] 0.26 [0.010] 0.38 [0.015] 0.29 [0.011] 1.58 [0.062] 0.21 [0.008]
0.25 [0.010] 0.53 [0.021]
3.17 [0.125]
1.20 [0.047]
0.75 [0.030] 0.005 CHAMFER (8PL)
O0.38 [O0.015] Plated Thru (4PL)
0.46 [0.018] 1.20 [0.047]
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 8
http://www.sirenza.com EDS-103643 Rev F

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